A few words about ARM Architecture
— January 21, 2013This tutorial covers most of the theory you need to know about ARM Family of CPU architecture. It includes features of ARM core, Version History. Anyone who is not interested in reading theory and just want to use it for some quick application development can skip this part of tutorial.
ARM is a 32-bit RISC (Reduced Instruction Set Computer) processor architecture developed by ARM corporation. It was previously known as Advanced RISC Machines and prior to that Acron RISC Machines.The ARM architecture is licensed to companies that want to manufacture ARM-based CPUs or system-on-a-chip products. This enables the licensees to develop their own processors compliant with the ARM instruction set architecture. For example, the device we are using (LPC21XX) is ARM architecture based SOC product developed by NXP semiconductors, similarly all major semiconductor manufacturers like Atmel, Samsung, TI they all make ARM based SOCs. So learning about ARM is pretty cool as once you are familiar to ARM instruction set you can easily switch between various ARM based SOCs available in market.
ARM Processors are embedded in products ranging from cell phones, PDAs to automotive breaking systems. You probably own one yourself unknowingly ! ARM cores are widely used in everyday digital electronic devices. ARM7TDMI is one of the most successful ARM core, it provides up to 120 Dhrystone MIPS and is known for its high code density and lower power consumption which makes it ideal for mobile electronics applications. ARM7TDMI is the one which we are going to learn over time.
RISC (Reduced Instruction SET !, What does that mean ?)
If you ask me in single line about, What RISC Computer really mean, I would say, In RISC I put as many instructions as i want but i keep all of them simple at hardware level. So, if I execute a program on a CISC computer and that same program on RISC computer. RISC computer may take more number of instructions than CISC, but RISC will execute them fast at real Hardware level, So ultimately its not like, that RISC is always fast, it depends on what kind of program you are running.
The RISC Features present in ARM are as follows.
- Large Uniform register file, with 16 general purpose registers in user mode.
- Load/Store Architecture : The instructions that process data operate only on registers and are separate from instructions that access memory. So the instructions that deals with data (addition, subtraction etc.) do not access memory at all. Separate instructions fetch data from memory and keep them in local registers, data instructions operate with data in registers.
- Uniform and fixed length instruction fields. All ARM instructions are 32 bit long and most of them have a regular three operand encoding.
Download ARM Architecture reference Manual here
Figure above is a block level architecture representation for ARM CORTEX M3, Each version of ARM architecture has some additional features along with the ARM cpu core. There are lots of interesting features in architecture of each of the ARM versions, it is not possible to discuss them in a single post, there are books dedicated to discuss the features of ARM architecture, but a curious mind like yours
can figure out on your own that, why ARM based SOCs are so much popular in consumer electronics devices and other digital places.
Data Sizes and Instruction SETS
- As mentioned earlier ARM is a 32 bit architecture. Data moves In/Out in 32 bit/ 4 Bytes chunk.
- For ARMs Byte means 8 bits, Half Word means 16 bits and Word means 32 bits.
- Most ARM implements two instruction Sets, 32 bit ARM Instructions and 16 bit THUMB Instructions.
History
For detailed version history of ARM cpu cores please visit
http://en.wikipedia.org/wiki/List_of_ARM_microprocessor_cores
Here we talk mostly about LPC Family of ARM based micro controller by NXP semi conductor and STM32 Family of ARM based SOCs.
You may also like to read…
I2C EEPROM Interfacing with STM32F4 Discovery Board http://www.electroons.com/blog/?p=1


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